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(parent: fb5af7d) | patch
ARM: fix cacheflush with PAN
authorRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Tue, 12 Nov 2024 10:16:13 +0000 (10:16 +0000)
committerRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Tue, 12 Nov 2024 23:51:06 +0000 (23:51 +0000)
commitca29cfcc4a21083d671522ad384532e28a43f033
treead848160925863dc73993f2915d57dfd500ed60ftree | snapshot
parentfb5af7d5405bf89a848819d1af007dfc73e9fb57commit | diff
ARM: fix cacheflush with PAN

It seems that the cacheflush syscall got broken when PAN for LPAE was
implemented. User access was not enabled around the cache maintenance
instructions, causing them to fault.

Fixes: 7af5b901e847 ("ARM: 9358/2: Implement PAN for LPAE by TTBR0 page table walks disablement")
Reported-by: Michał Pecio <michal.pecio@gmail.com>
Tested-by: Michał Pecio <michal.pecio@gmail.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
arch/arm/kernel/traps.c diff | blob | history
Domain: System / Kernel;