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(parent: cb79f50) | patch
dt-binding: serial: tegra: add new chips
authorKrishna Yarlagadda <kyarlagadda@nvidia.com>
Wed, 4 Sep 2019 04:43:00 +0000 (10:13 +0530)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 5 Sep 2019 08:00:04 +0000 (10:00 +0200)
commitc9fd37f926fc57c2788504da429521227ab5a024
tree78999134c6e2102de5ef4fce1e40c5b9daaddf5ftree | snapshot
parentcb79f504bb261460bd54b8a5577100f21982b20acommit | diff
dt-binding: serial: tegra: add new chips

Add new compatible string for Tegra186. It differs from earlier chips
as it has FIFO mode enable check and 8 byte DMA buffer.
Add new compatible string for Tegra194. Tegra194 has different error
tolerance levels for baud rate compared to older chips.

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Link: https://lore.kernel.org/r/1567572187-29820-6-git-send-email-kyarlagadda@nvidia.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt diff | blob | history
Domain: System / Kernel;