[WebAssembly] Fix encoding of non-SIMD vector-typed instructions
authorHeejin Ahn <aheejin@gmail.com>
Tue, 14 Aug 2018 19:03:36 +0000 (19:03 +0000)
committerHeejin Ahn <aheejin@gmail.com>
Tue, 14 Aug 2018 19:03:36 +0000 (19:03 +0000)
commitc9c711a0acc9794470b059f94ea09ac70677e295
tree07863169ad9e9ab959eaa0f31ddd2168ba97954a
parenta1e55d252e8415df4670b4b630d5671c745bb84e
[WebAssembly] Fix encoding of non-SIMD vector-typed instructions

Previously SIMD_I was the same as a normal instruction except for the
addition of a HasSIM128 predicate. However, rL339186 changed the
encoding of SIMD_I instructions to automatically contain the SIMD
prefix byte. This broke the encoding of non-SIMD vector-typed
instructions, which had instantiated SIMD_I. This CL corrects this
error.

Reviewers: aheejin

Subscribers: sunfish, jgravelle-google, sbc100, llvm-commits

Differential Revision: https://reviews.llvm.org/D50682

Patch by Thomas Lively (tlively)

llvm-svn: 339710
llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td