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[X86] Add ISD::FREEZE and ISD::AssertAlign to the list of opcodes that don't guarante...
authorCraig Topper <craig.topper@sifive.com>
Sat, 12 Jun 2021 16:49:32 +0000 (09:49 -0700)
committerCraig Topper <craig.topper@sifive.com>
Sat, 12 Jun 2021 16:52:29 +0000 (09:52 -0700)
commitc997867dc084a1bcf631816f964b3ff49a297ba3
tree77d6270979b6a5edc7cd581c90bf0ae5598b71f0tree | snapshot
parent76f1baa7875acd88bdd4b431eed6e2d2decfc0fecommit | diff
[X86] Add ISD::FREEZE and ISD::AssertAlign to the list of opcodes that don't guarantee upper 32 bits are zero.

The freeze issue was reported here
https://llvm.discourse.group/t/bug-or-feature-freeze-instruction/3639

I don't have a test for AssertAlign. I just noticed it was missing
and assume it should be similar to the other two Asserts.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D104178
llvm/lib/Target/X86/X86InstrCompiler.td diff | blob | history
llvm/test/CodeGen/X86/freeze.ll diff | blob | history
Domain: System / Toolchain;