drm/msm/dpu: allow just single IRQ callback
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Thu, 17 Feb 2022 04:31:45 +0000 (07:31 +0300)
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Sun, 1 May 2022 23:07:07 +0000 (02:07 +0300)
commitc929ac60b3ed34accd25a052a4833e418900f466
tree8c228a45c44c0d2e35023afb905e91054296c6cf
parent52db0f2b9f6e131c759a480790a902c6237b453f
drm/msm/dpu: allow just single IRQ callback

DPU interrupts code allows multiple callbacks per interrut. In reality
none of the interrupts is shared between blocks (and will probably never
be). Drop support for registering multiple callbacks per interrupt to
simplify interrupt handling code.

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/474701/
Link: https://lore.kernel.org/r/20220217043148.480898-4-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h