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(parent: a096f46) | patch
nir, ac, aco: Add ACCESS intrinsic index to load/store_buffer_amd.
authorTimur Kristóf <timur.kristof@gmail.com>
Tue, 19 Apr 2022 11:50:43 +0000 (13:50 +0200)
committerMarge Bot <emma+marge@anholt.net>
Thu, 20 Oct 2022 20:00:49 +0000 (20:00 +0000)
commitc918f0934ef833f9172c2a27e826abbbc810e2f5
tree2216686e016baf335f77b7b4fb6bff65ec9bfd89tree | snapshot
parenta096f46836ad8c7e1055972b0ec6dc5af3ef4707commit | diff
nir, ac, aco: Add ACCESS intrinsic index to load/store_buffer_amd.

Previously, we always treated these as coherent, but now let's make
this configurable. Also set all current users to ACCESS_COHERENT.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com> (nir)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17551>
src/amd/common/ac_nir_lower_esgs_io_to_mem.c diff | blob | history
src/amd/common/ac_nir_lower_ngg.c diff | blob | history
src/amd/common/ac_nir_lower_taskmesh_io_to_mem.c diff | blob | history
src/amd/common/ac_nir_lower_tess_io_to_mem.c diff | blob | history
src/amd/compiler/aco_instruction_selection.cpp diff | blob | history
src/amd/llvm/ac_nir_to_llvm.c diff | blob | history
src/compiler/nir/nir_intrinsics.py diff | blob | history
Domain: Graphics System / GL;