radeonsi: use SET_SH_REG_INDEX with index=3 for registers containing CU_EN
authorMarek Olšák <marek.olsak@amd.com>
Tue, 22 Feb 2022 08:05:35 +0000 (03:05 -0500)
committerMarge Bot <emma+marge@anholt.net>
Tue, 22 Feb 2022 11:41:04 +0000 (11:41 +0000)
commitc8e2c6faf6448697d949b962179a543ac9c2afee
tree6b134ed51bf01b759c3cfb4996a8078a9b661bf2
parent79a7ab642ac1e103c9b00e197105eb3f10c6c523
radeonsi: use SET_SH_REG_INDEX with index=3 for registers containing CU_EN

This matches PAL and RADV behavior. It's for preemption.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15098>
src/gallium/drivers/radeonsi/si_build_pm4.h
src/gallium/drivers/radeonsi/si_pm4.c
src/gallium/drivers/radeonsi/si_pm4.h
src/gallium/drivers/radeonsi/si_state.c
src/gallium/drivers/radeonsi/si_state_shaders.cpp