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(parent: 496182a) | patch
mmc: sdhci-of-esdhc: limit the SDHC clock frequency
authorAndy Tang <andy.tang@nxp.com>
Fri, 2 Dec 2022 07:59:05 +0000 (15:59 +0800)
committerUlf Hansson <ulf.hansson@linaro.org>
Wed, 7 Dec 2022 12:29:14 +0000 (13:29 +0100)
commitc8d2d76d7646dc9b2d377699f68dce5403ad9b80
tree21e9ec0c5bc507bb543ba0a1f155df50f6946be8tree | snapshot
parent496182a389627a60d1b12be32d1640b14c678b8bcommit | diff
mmc: sdhci-of-esdhc: limit the SDHC clock frequency

The highest clock frequency for eMMC HS200 mode on ls1043a
is 116.7Mhz according to its specification.
So add the limit to gate the frequency.

Signed-off-by: Andy Tang <andy.tang@nxp.com>
Link: https://lore.kernel.org/r/20221202075905.25363-1-andy.tang@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-of-esdhc.c diff | blob | history
Domain: System / Kernel;