arm: improve tests and fix vnegq*
authorAndrea Corallo <andrea.corallo@arm.com>
Mon, 28 Nov 2022 16:09:16 +0000 (17:09 +0100)
committerAndrea Corallo <andrea.corallo@arm.com>
Wed, 25 Jan 2023 13:36:21 +0000 (14:36 +0100)
commitc8cb7e062664e5db5969de4239be513dfd6ab1d1
treedb0861547769a955dae8b572fa956c6bbe0f5826
parent16452c63e10f7a44c70bec0216358ac405abfcf6
arm: improve tests and fix vnegq*

gcc/ChangeLog:

* config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
Fix spacing.

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vnegq_f16.c: Use
check-function-bodies instead of scan-assembler checks.  Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vnegq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_x_s8.c: Likewise.
* gcc.target/arm/simd/mve-vneg.c: Update test.
* gcc.target/arm/simd/mve-vshr.c: Likewise
18 files changed:
gcc/config/arm/mve.md
gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c
gcc/testsuite/gcc.target/arm/simd/mve-vneg.c
gcc/testsuite/gcc.target/arm/simd/mve-vshr.c