clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support
authorBoris BREZILLON <boris.brezillon@free-electrons.com>
Thu, 15 May 2014 08:55:11 +0000 (10:55 +0200)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Wed, 11 Jun 2014 08:25:02 +0000 (10:25 +0200)
commitc8a76cac19eebf65f629e3676e57743f9dfeea8f
tree3988645d9fe86f15009e324b8e0ac575d2c27d7d
parentefb3184c08927c54ed984c85f69f54ff1dbd2c37
clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support

The PRCM (Power/Reset/Clock Management) unit provides several clock
devices:
- AR100 clk: used to clock the Power Management co-processor
- AHB0 clk: used to clock the AHB0 bus
- APB0 clk and gates: used to clk peripherals connected to the APB0 bus

Add support for these clks in a separate driver so that they can be probed
as platform devices instead of registered during early init.
This is needed to be able to probe PRCM MFD subdevices.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Emilio López <emilio@elopez.com.ar>
drivers/clk/sunxi/Makefile
drivers/clk/sunxi/clk-sun6i-apb0-gates.c [new file with mode: 0644]
drivers/clk/sunxi/clk-sun6i-apb0.c [new file with mode: 0644]
drivers/clk/sunxi/clk-sun6i-ar100.c [new file with mode: 0644]