[ARM] Parallel DSP Pass
authorSjoerd Meijer <sjoerd.meijer@arm.com>
Thu, 28 Jun 2018 12:55:29 +0000 (12:55 +0000)
committerSjoerd Meijer <sjoerd.meijer@arm.com>
Thu, 28 Jun 2018 12:55:29 +0000 (12:55 +0000)
commitc89ca5582a0666e926426e3ad95233ed85f8e5b1
tree5de2a827c7e3f164b651e738a2f78caff9e84584
parent805583e6a6c21bd7bb9e84fe2c7d7280e9af77cb
[ARM] Parallel DSP Pass

Armv6 introduced instructions to perform 32-bit SIMD operations. The purpose of
this pass is to do some straightforward IR pattern matching to create ACLE DSP
intrinsics, which map on these 32-bit SIMD operations.

Currently, only the SMLAD instruction gets recognised. This instruction
performs two multiplications with 16-bit operands, and stores the result in an
accumulator. We will follow this up with patches to recognise SMLAD in more
cases, and also to generate other DSP instructions (like e.g. SADD16).

Patch by: Sam Parker and Sjoerd Meijer

Differential Revision: https://reviews.llvm.org/D48128

llvm-svn: 335850
18 files changed:
llvm/lib/Target/ARM/ARM.h
llvm/lib/Target/ARM/ARMParallelDSP.cpp [new file with mode: 0644]
llvm/lib/Target/ARM/ARMTargetMachine.cpp
llvm/lib/Target/ARM/CMakeLists.txt
llvm/lib/Target/ARM/LLVMBuild.txt
llvm/test/CodeGen/ARM/smlad0.ll [new file with mode: 0644]
llvm/test/CodeGen/ARM/smlad1.ll [new file with mode: 0644]
llvm/test/CodeGen/ARM/smlad10.ll [new file with mode: 0644]
llvm/test/CodeGen/ARM/smlad11.ll [new file with mode: 0644]
llvm/test/CodeGen/ARM/smlad12.ll [new file with mode: 0644]
llvm/test/CodeGen/ARM/smlad2.ll [new file with mode: 0644]
llvm/test/CodeGen/ARM/smlad3.ll [new file with mode: 0644]
llvm/test/CodeGen/ARM/smlad4.ll [new file with mode: 0644]
llvm/test/CodeGen/ARM/smlad5.ll [new file with mode: 0644]
llvm/test/CodeGen/ARM/smlad6.ll [new file with mode: 0644]
llvm/test/CodeGen/ARM/smlad7.ll [new file with mode: 0644]
llvm/test/CodeGen/ARM/smlad8.ll [new file with mode: 0644]
llvm/test/CodeGen/ARM/smlad9.ll [new file with mode: 0644]