powerpc/bpf/32: introduce a second source register for ALU operations
authorChristophe Leroy <christophe.leroy@csgroup.eu>
Wed, 1 Feb 2023 10:04:30 +0000 (11:04 +0100)
committerMichael Ellerman <mpe@ellerman.id.au>
Fri, 10 Feb 2023 11:17:35 +0000 (22:17 +1100)
commitc88da29b4d2ce8d0070646b8f99729e9b355a4bf
tree48939453e875f8348a5f25b7ac207673787bcbba
parent8616045fe785229b53a24b8698631826298d1500
powerpc/bpf/32: introduce a second source register for ALU operations

At the time being, all ALU operation are performed with same L-source
and destination, requiring the L-source to be moved into destination via
a separate register move, like:

  70: 7f c6 f3 78  mr      r6,r30
  74: 7f a5 eb 78  mr      r5,r29
  78: 30 c6 ff f4  addic   r6,r6,-12
  7c: 7c a5 01 d4  addme   r5,r5

Introduce a second source register to all ALU operations. For the time
being that second source register is made equal to the destination
register.

That change will allow, via following patch, to optimise the generated
code as:

  70: 30 de ff f4  addic   r6,r30,-12
  74: 7c bd 01 d4  addme   r5,r29

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/d5aaaba50d9d6b4a0e9f0cd4a5e34101aca1e247.1675245773.git.christophe.leroy@csgroup.eu
arch/powerpc/net/bpf_jit_comp32.c