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[AMDGPU] Tidy SReg/SGPR definitions using template class
authorCarl Ritson <carl.ritson@amd.com>
Sat, 17 Jul 2021 02:26:04 +0000 (11:26 +0900)
committerCarl Ritson <carl.ritson@amd.com>
Sat, 17 Jul 2021 02:26:46 +0000 (11:26 +0900)
commitc7f2f81f5e2a1e3b54a2d69e37d7309296a0f4b8
tree06d940e8a5cc7d66531ea703f15ad780939f0e4dtree | snapshot
parent6545fdc6d73f3531c020f9655e0e92eae2d55f3bcommit | diff
[AMDGPU] Tidy SReg/SGPR definitions using template class

Use a multiclass to consistently define SReg/SGPR/TTMP register classes.
Add missing TTMP registers for 96b, 160b, 192b, 224b.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D105800
llvm/lib/Target/AMDGPU/SIRegisterInfo.td diff | blob | history
llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll diff | blob | history
Domain: System / Toolchain;