aarch64: Reimplement vmovn_high_* intrinsics using builtins
authorKyrylo Tkachov <kyrylo.tkachov@arm.com>
Tue, 12 Jan 2021 10:07:19 +0000 (10:07 +0000)
committerKyrylo Tkachov <kyrylo.tkachov@arm.com>
Thu, 14 Jan 2021 08:36:19 +0000 (08:36 +0000)
commitc7f1ff01a2342ffd2873528018e5c3650b791d7e
tree26df14b4c978d2685b68214e74c7670a2ed3d3c4
parentbe0851b8e934dfe95881f97dcf98518f92e7508c
aarch64: Reimplement vmovn_high_* intrinsics using builtins

The vmovn_high* intrinsics are supposed to map to XTN2 instructions that
narrow their source vector and instert it into the top half of the destination vector.
This patch reimplements them away from inline assembly to an RTL builtin
that performs a vec_concat with a truncate.

gcc/
* config/aarch64/aarch64-simd.md (aarch64_xtn2<mode>_le):
Define.
(aarch64_xtn2<mode>_be): Likewise.
(aarch64_xtn2<mode>): Likewise.
* config/aarch64/aarch64-simd-builtins.def (xtn2): Define
builtins.
* config/aarch64/arm_neon.h (vmovn_high_s16): Reimplement using
builtins.
(vmovn_high_s32): Likewise.
(vmovn_high_s64): Likewise.
(vmovn_high_u16): Likewise.
(vmovn_high_u32): Likewise.
(vmovn_high_u64): Likewise.

gcc/testsuite/
* gcc.target/aarch64/narrow_high-intrinsics.c: Adjust
scan-assembler-times for xtn2.
gcc/config/aarch64/aarch64-simd-builtins.def
gcc/config/aarch64/aarch64-simd.md
gcc/config/aarch64/arm_neon.h
gcc/testsuite/gcc.target/aarch64/narrow_high-intrinsics.c