[RISCV] Support isel of scalable vector bitcasts
authorCraig Topper <craig.topper@sifive.com>
Thu, 18 Feb 2021 16:54:03 +0000 (08:54 -0800)
committerCraig Topper <craig.topper@sifive.com>
Thu, 18 Feb 2021 17:01:13 +0000 (09:01 -0800)
commitc7dd92e8a590cd456b4daad87af9d3b746d05ca6
tree2f0b9e147e4057d6fcfed5dadd70fc5d75c953c4
parent5318d9e5165a6e7f10c602ab85cb24ed2dfceed4
[RISCV] Support isel of scalable vector bitcasts

These should be NOPs so we can just replace with the input. This
matches what SVE does with isel patterns for all permutations.
Custom isel saves us from having to list all permurations for
all LMULs.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D96921
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat-rv32.ll