clk: qcom: Base rcg parent rate off plan frequency
authorEvan Green <evgreen@chromium.org>
Fri, 13 Apr 2018 20:33:36 +0000 (13:33 -0700)
committerStephen Boyd <sboyd@kernel.org>
Thu, 10 May 2018 18:45:32 +0000 (11:45 -0700)
commitc7d2a0eb6c028ba064bfe92d7667977418142c7c
tree9da73e9892d20d5737a605f7e319d7b45256f045
parent60cc43fc888428bb2f18f08997432d426a243338
clk: qcom: Base rcg parent rate off plan frequency

_freq_tbl_determine_rate uses the pre_div found in the clock plan
multiplied by the requested rate from the caller to determine the
best parent rate to set. If the requested rate is not exactly equal
to the rate that was found in the clock plan, then using the requested
rate in parent rate calculations is incorrect. For instance, if 150MHz
was requested, but 200MHz was the match found, and that plan had a
pre_div of 3, then the parent should be set to 600MHz, not 450MHz.

Signed-off-by: Evan Green <evgreen@chromium.org>
Fixes: bcd61c0f535a ("clk: qcom: Add support for root clock generators (RCGs)")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/qcom/clk-rcg2.c