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AVX512: Add vpmovzxbw/d/q ,vpmovzxw/d/q ,vpmovzxbdq lowering patterns that support...
authorIgor Breger <igor.breger@intel.com>
Wed, 24 Feb 2016 08:15:20 +0000 (08:15 +0000)
committerIgor Breger <igor.breger@intel.com>
Wed, 24 Feb 2016 08:15:20 +0000 (08:15 +0000)
commitc7ba5699c5a9e908c05a2a94f56852300095a280
tree4634f6aea1ef12c8859cf4ecc0ec42deed01de0btree | snapshot
parent2c56f33dbf6d56f61ecdff2cc75a2c1a53f16584commit | diff
AVX512: Add vpmovzxbw/d/q ,vpmovzxw/d/q ,vpmovzxbdq lowering patterns that support 256bit inputs like AVX patterns ( that are disable in case HasVLX , see SS41I_pmovx_avx2_patterns).

Differential Revision: http://reviews.llvm.org/D17504

llvm-svn: 261724
llvm/lib/Target/X86/X86InstrAVX512.td diff | blob | history
llvm/test/CodeGen/X86/avx512-ext.ll diff | blob | history
Domain: System / Toolchain;