RISC-V: ABI Implementation

RISC-V: ABI Implementation

This patch contains code that needs to directly know about the RISC-V
ABI, which is specified in a work-in-progress psABI document:

  https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md

This is meant to contain all the RISC-V code that needs to explicitly
name registers or manage in-memory structure layout.  This does not
contain any of the Linux-specific code.

2018-01-29  Palmer Dabbelt  <palmer@sifive.com>

        * sysdeps/riscv/__longjmp.S: New file.
        * sysdeps/riscv/backtrace.c: Likewise.
        * sysdeps/riscv/bits/endian.h: Likewise.
        * sysdeps/riscv/bits/setjmp.h: Likewise.
        * sysdeps/riscv/bits/wordsize.h: Likewise.
        * sysdeps/riscv/bsd-_setjmp.c: Likewise.
        * sysdeps/riscv/bsd-setjmp.c: Likewise.
        * sysdeps/riscv/dl-trampoline.S: Likewise.
        * sysdeps/riscv/gccframe.h: Likewise.
        * sysdeps/riscv/jmpbuf-offsets.h: Likewise.
        * sysdeps/riscv/jmpbuf-unwind.h: Likewise.
        * sysdeps/riscv/machine-gmon.h: Likewise.
        * sysdeps/riscv/memusage.h: Likewise.
        * sysdeps/riscv/setjmp.S: Likewise.
        * sysdeps/riscv/sys/asm.h: Likewise.
        * sysdeps/riscv/tls-macros.h: Likewise.