projects / platform / upstream / gcc.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 7330750) | patch
re PR target/71676 ([avr] casesi won't handle switch values larger than 16 bits)
authorGeorg-Johann Lay <avr@gjlay.de>
Tue, 25 Oct 2016 08:26:59 +0000 (08:26 +0000)
committerGeorg-Johann Lay <gjl@gcc.gnu.org>
Tue, 25 Oct 2016 08:26:59 +0000 (08:26 +0000)
commitc7212a155c2f3fdf585f7693159aa4d932d9a585
tree7eebf074589f66cc31d2b6d320dca8f019c1ad2etree | snapshot
parent7330750cbfe318a5c686d386727cbeb40d5e9d25commit | diff
re PR target/71676 ([avr] casesi won't handle switch values larger than 16 bits)

gcc/
PR target/71676
PR target/71678
* config/avr/avr.md (casesi): Rewrite avoiding subregs of SI.
gcc/testsuite/
PR target/71676
PR target/71678
* gcc.target/avr/pr71676-1.c: New test.
* gcc.target/avr/pr71676-3.c: New test.
* gcc.target/avr/pr71676.c: New test.
* gcc.target/avr/pr71678.c: New test.

Co-Authored-By: Pitchumani Sivanupandi <pitchumani.sivanupandi@microchip.com>
From-SVN: r241503
gcc/ChangeLog diff | blob | history
gcc/config/avr/avr.md diff | blob | history
gcc/testsuite/ChangeLog diff | blob | history
gcc/testsuite/gcc.target/avr/pr71676-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/avr/pr71676-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/avr/pr71676.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/avr/pr71678.c [new file with mode: 0644] blob
Domain: System / Toolchain;