projects / platform / kernel / linux-exynos.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: b75513b) | patch
clk: keystone: add support for post divider register for main pll
authorMurali Karicheri <m-karicheri2@ti.com>
Fri, 29 May 2015 16:04:12 +0000 (12:04 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 17 Aug 2015 03:52:17 +0000 (20:52 -0700)
commitc6fdd1b52bb30abd861708f18509493cbb84ec44
tree2b18fb5a2058c694b630b2f2ae7e04d58acf19f2tree | snapshot
parentb75513b0f1c734b1e084a6e9952ea6260d4724e3commit | diff
clk: keystone: add support for post divider register for main pll

commit 02fdfd708fd252a778709beb6c65d5e7360341ac upstream.

Main PLL controller has post divider bits in a separate register in
pll controller. Use the value from this register instead of fixed
divider when available.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Documentation/devicetree/bindings/clock/keystone-pll.txt diff | blob | history
drivers/clk/keystone/pll.c diff | blob | history
Domain: System / Kernel;