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(parent: 3d8f1b2) | patch
[SelectionDAG] ComputeNumSignBits add getValidMaximumShiftAmountConstant() for ISD...
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Mon, 13 Jan 2020 17:56:15 +0000 (17:56 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Mon, 13 Jan 2020 18:02:37 +0000 (18:02 +0000)
commitc6fcd5d115b62280669719c5ead436904c93d6cb
tree935f4ffec17cdf562aaee6b24616b08024c1ca96tree | snapshot
parent3d8f1b2d22be79aab3d246fa5bc9c24b911b0bd2commit | diff
[SelectionDAG] ComputeNumSignBits add getValidMaximumShiftAmountConstant() for ISD::SHL support

Allows us to handle non-uniform SHL shifts to determine the minimum number of sign bits remaining (based off the maximum shift amount value)
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff | blob | history
llvm/test/CodeGen/X86/known-signbits-vector.ll diff | blob | history
Domain: System / Toolchain;