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[ARM] 3783/1: S3C2412: fix IRQ_EINT0 to IRQ_EINT3 handling
authorBen Dooks <ben-linux@fluff.org>
Sat, 9 Sep 2006 20:24:13 +0000 (21:24 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Sat, 9 Sep 2006 20:24:13 +0000 (21:24 +0100)
commitc6e58ebb373666eba007e3793789e06a4655df61
tree2b325fb3be45d0768268d32fc747519513ddf2d5tree | snapshot
parent3c06cd1c99449b2fd373df24fbc87e804f4ec4e6commit | diff
[ARM] 3783/1: S3C2412: fix IRQ_EINT0 to IRQ_EINT3 handling

Patch from Ben Dooks

The IRQ_EINT0 through IRQ_EINT3 handling has changed
on the S3C2412 from the previous SoCs in the range,
and thus we need to add code to handle this.

The changes come about due to these IRQs being
displayed in two different registers, and needing to
be acked and masked in both.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-s3c2410/Makefile diff | blob | history
arch/arm/mach-s3c2410/irq.c diff | blob | history
arch/arm/mach-s3c2410/irq.h diff | blob | history
arch/arm/mach-s3c2410/s3c2412-irq.c [new file with mode: 0644] blob
Domain: System / Uncategorized;