[X86] Improve the gather scheduler models for SkylakeClient and SkylakeServer
authorCraig Topper <craig.topper@intel.com>
Wed, 5 Feb 2020 20:15:01 +0000 (12:15 -0800)
committerCraig Topper <craig.topper@intel.com>
Wed, 5 Feb 2020 21:26:47 +0000 (13:26 -0800)
commitc6bdd8e73110e14dc54833137cecef9c07d2dc24
treebcdbf3c1883489fe9265d98c1b41a1a1257d2984
parentbaafe82b07ade3fff4f2685199870b67083a17d5
[X86] Improve the gather scheduler models for SkylakeClient and SkylakeServer

The load ports need a cycle for each potentially loaded element just like Haswell and Skylake. Unlike Haswell and Broadwell, the number of uops does not scale with the number of elements. Instead the load uops run for multiple cycles.

I've taken the latency number from the uops.info. The port binding for the non-load uops is taken from the original IACA data I have.

Differential Revision: https://reviews.llvm.org/D74000
llvm/lib/Target/X86/X86SchedSkylakeClient.td
llvm/lib/Target/X86/X86SchedSkylakeServer.td
llvm/test/tools/llvm-mca/X86/Generic/resources-avx512.s
llvm/test/tools/llvm-mca/X86/Generic/resources-avx512vl.s
llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-avx2.s
llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx2.s
llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512.s
llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512vl.s