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arm64: dts: renesas: r9a09g011: Add L2 Cache node
authorBiju Das <biju.das.jz@bp.renesas.com>
Thu, 10 Nov 2022 16:09:31 +0000 (16:09 +0000)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 15 Nov 2022 08:40:10 +0000 (09:40 +0100)
commitc6b1737f45ca708fee76a30afb4a7b0247455749
tree9dc5e71440e4c2badfc599a9eb7482c6c464c9dctree | snapshot
parent594edf2c61f2eb79234e642e3a82d7ae02e7a241commit | diff
arm64: dts: renesas: r9a09g011: Add L2 Cache node

The Cortex-A53 processor on RZ/V2M has 512 KB L2 Cache.
Add L2 Cache node to SoC dtsi.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20221110160931.101539-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r9a09g011.dtsi diff | blob | history
Domain: System / Kernel;