x86/mce: Check MCi_STATUS[MISCV] for usable addr on Intel only
authorBorislav Petkov <bp@suse.de>
Tue, 18 Apr 2017 18:39:24 +0000 (20:39 +0200)
committerThomas Gleixner <tglx@linutronix.de>
Wed, 19 Apr 2017 10:04:46 +0000 (12:04 +0200)
commitc6a9583fb41c8bd017f643d5bc90a0fe0a92fe43
tree778468d19aabb514809cd930b6766c01002e8205
parent7237c75b2717d59ebf2c2595d416e16a160154e1
x86/mce: Check MCi_STATUS[MISCV] for usable addr on Intel only

mce_usable_address() does a bunch of basic sanity checks to verify
whether the address reported with the error is usable for further
processing. However, we do check MCi_STATUS[MISCV] and that is not
needed on AMD as that bit says that there's additional information about
the logged error in the MCi_MISCj banks.

But we don't need that to know whether the address is usable - we only
need to know whether the physical address is valid - i.e., ADDRV.

On Intel the MISCV bit is needed to perform additional checks to determine
whether the reported address is a physical one, etc.

Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Yazen Ghannam <yazen.ghannam@amd.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/20170418183924.6agjkebilwqj26or@pd.tnic
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
arch/x86/kernel/cpu/mcheck/mce.c