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[AArch64][SVE] Asm: Support for ADR instruction.
authorSander de Smalen <sander.desmalen@arm.com>
Mon, 9 Jul 2018 09:58:24 +0000 (09:58 +0000)
committerSander de Smalen <sander.desmalen@arm.com>
Mon, 9 Jul 2018 09:58:24 +0000 (09:58 +0000)
commitc69944c6b0f88dffdeb43bc12795af4b209d1385
tree5a9c97f191ba88010d4cafdeb4e6dc63c6017639tree | snapshot
parent16958bb6360332f1947e2c4d94f85142c58a29bdcommit | diff
[AArch64][SVE] Asm: Support for ADR instruction.

Supporting various addressing modes:
- adr z0.s, [z0.s, z0.s]
- adr z0.s, [z0.s, z0.s, lsl #<shift>]
- adr z0.d, [z0.d, z0.d]
- adr z0.d, [z0.d, z0.d, lsl #<shift>]
- adr z0.d, [z0.d, z0.d, uxtw #<shift>]
- adr z0.d, [z0.d, z0.d, sxtw #<shift>]

Reviewers: rengolin, fhahn, SjoerdMeijer, samparker, javed.absar

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D48870

llvm-svn: 336533
llvm/lib/Target/AArch64/AArch64RegisterInfo.td diff | blob | history
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td diff | blob | history
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp diff | blob | history
llvm/lib/Target/AArch64/SVEInstrFormats.td diff | blob | history
llvm/test/MC/AArch64/SVE/adr-diagnostics.s [new file with mode: 0644] blob
llvm/test/MC/AArch64/SVE/adr.s [new file with mode: 0644] blob
Domain: System / Toolchain;