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(parent: 96d59e9) | patch
arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines
authorDinh Nguyen <dinguyen@opensource.altera.com>
Mon, 2 Nov 2015 23:11:21 +0000 (17:11 -0600)
committerMarek Vasut <marex@denx.de>
Tue, 3 Nov 2015 16:32:16 +0000 (17:32 +0100)
commitc624d07f3ff7ae7d29672bab189d2aeb99c63a95
treed1ace21fa5e8986683e6fbb282a8af07575869c0tree | snapshot
parent96d59e9d6aa74e35c63dc74da10e41f8ba0f6de4commit | diff
arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines

The DMA, QSPI, and SD/MMC reset bits are located in the permodrst register,
not the mpumodrst. So the bank for these reset bits should be 1, not 0.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
arch/arm/mach-socfpga/include/mach/reset_manager.h diff | blob | history
Domain: System / Kernel;