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(parent: 1ae8862) | patch
irqchip/gic-v2: Reset APRn registers at boot time
authorMarc Zyngier <marc.zyngier@arm.com>
Fri, 9 Mar 2018 14:53:19 +0000 (14:53 +0000)
committerMarc Zyngier <marc.zyngier@arm.com>
Wed, 14 Mar 2018 11:11:28 +0000 (11:11 +0000)
commitc5e1035c9687025373b7c48a08efb37f5329916b
treef461f1b4845c994d037110bad7dd44d27f6dcc0ctree | snapshot
parent1ae8862e27e2b68542294747ae473fb3e1024f74commit | diff
irqchip/gic-v2: Reset APRn registers at boot time

Booting a crash kernel while in an interrupt handler is likely
to leave the Active Priority Registers with some state that
is not relevant to the new kernel, and is likely to lead
to erratic behaviours such as interrupts not firing as their
priority is already active.

As a sanity measure, wipe the APRs clean on startup.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
drivers/irqchip/irq-gic.c diff | blob | history
Domain: System / Kernel;