[RISCV] Add support for XCVbitmanip extension in CV32E40P
authormelonedo <funanzeng@gmail.com>
Wed, 14 Jun 2023 13:42:57 +0000 (21:42 +0800)
committermelonedo <funanzeng@gmail.com>
Mon, 19 Jun 2023 13:16:07 +0000 (21:16 +0800)
commitc5a412dad5b89996cdd1661075c63dbf884f8e5c
tree6f3932d813d6c6d140f35e8eba248a4d59180b92
parentc7d3c84449f403716a8866e50491a1860a935b30
[RISCV] Add support for XCVbitmanip extension in CV32E40P

Implement XCVbitmanip intrinsics for CV32E40P according to the specification.

This commit is part of a patch-set to upstream the 7 vendor specific extensions of CV32E40P.

Contributors: @CharKeaney, @jeremybennett, @lewis-revill, @liaolucy, @simoncook, @xmj.

Spec: https://github.com/openhwgroup/cv32e40p/blob/62bec66b36182215e18c9cf10f723567e23878e9/docs/source/instruction_set_extensions.rst

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D152915
llvm/docs/RISCVUsage.rst
llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
llvm/lib/Target/RISCV/RISCVFeatures.td
llvm/lib/Target/RISCV/RISCVInstrInfo.td
llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td [new file with mode: 0644]
llvm/test/MC/RISCV/corev/XCVbitmanip-invalid.s [new file with mode: 0644]
llvm/test/MC/RISCV/corev/XCVbitmanip.s [new file with mode: 0644]