This is pretty unlikely in real code...
authorRichard Earnshaw <rearnsha@arm.com>
Fri, 25 Jan 2019 17:09:33 +0000 (17:09 +0000)
committerRichard Earnshaw <rearnsha@gcc.gnu.org>
Fri, 25 Jan 2019 17:09:33 +0000 (17:09 +0000)
commitc590597c45948c6e6fa282878198fd226da95998
tree59ba839dbbd2a98b9c31f9c29d59da3b5b69ad4a
parent3c35efc322f7ff8d25b81cf9ebc01d0ec202bb89
This is pretty unlikely in real code...

This is pretty unlikely in real code, but similar to Arm, the AArch64
ABI has a bug with the handling of 128-bit bit-fields, where if the
bit-field dominates the overall alignment the back-end code may end up
passing the argument correctly.  This is a regression that started in
gcc-6 when the ABI support code was updated to support overaligned
types.  The fix is very similar in concept to the Arm fix.  128-bit
bit-fields are fortunately extremely rare, so I'd be very surprised if
anyone has been bitten by this.

PR target/88469
gcc/
* config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add new
argument ABI_BREAK.  Set to true if the calculated alignment has
changed in gcc-9.  Check bit-fields for their base type alignment.
(aarch64_layout_arg): Warn if argument passing has changed in gcc-9.
(aarch64_function_arg_boundary): Likewise.
(aarch64_gimplify_va_arg_expr): Likewise.

gcc/testsuite/
* gcc.target/aarch64/aapcs64/test_align-10.c: New test.
* gcc.target/aarch64/aapcs64/test_align-11.c: New test.
* gcc.target/aarch64/aapcs64/test_align-12.c: New test.

From-SVN: r268273
gcc/ChangeLog
gcc/config/aarch64/aarch64.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-10.c [new file with mode: 0644]
gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-11.c [new file with mode: 0644]
gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-12.c [new file with mode: 0644]