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RISC-V: Make the test condition more strict for gcc.target/riscv/_Float16-zhinxmin-1.c
authorKito Cheng <kito.cheng@sifive.com>
Wed, 22 Feb 2023 09:16:20 +0000 (17:16 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Wed, 22 Feb 2023 12:20:34 +0000 (20:20 +0800)
commitc57fbdd6f11de2916fd0df6553e35117d3d12c5a
treee0d29910c030151a07ae030747edf521028f5c30tree | snapshot
parenta0abd652e3878bd79ed802e868324ae3f617c380commit | diff
RISC-V: Make the test condition more strict for gcc.target/riscv/_Float16-zhinxmin-1.c

LTO might generate random string for the section name, which might contain `mv`,
then might cause random false alarm.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/_Float16-zhinxmin-1.c: Tweak test
condition.
gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c diff | blob | history
Domain: System / Toolchain;