[Arm64] Support Vector64<double>, Vector64<long>, and Vector64<ulong> (#1747)
authorEgor Chesakov <Egor.Chesakov@microsoft.com>
Thu, 30 Jan 2020 03:31:52 +0000 (19:31 -0800)
committerGitHub <noreply@github.com>
Thu, 30 Jan 2020 03:31:52 +0000 (19:31 -0800)
commitc54ee0695ea5af5b56fb2609e67a3b60f1da361e
tree730014bbbce818abe2616add6ecd698ae9e65867
parent5b5aec6db97a6313a78f82fbc879e2b182d9c348
[Arm64] Support Vector64<double>, Vector64<long>, and Vector64<ulong> (#1747)

* Add "LoadVector64" for Vector64<double>, Vector64<long> and Vector64<ulong> in AdvSimd.PlatformNotSupported.cs AdvSimd.cs

* Update "Abs" and "AbsScalar" in AdvSimd.PlatformNotSupported.cs AdvSimd.cs

* Update "AbsoluteCompareGreaterThan" and "AbsoluteCompareGreaterThanScalar" in AdvSimd.PlatformNotSupported.cs AdvSimd.cs

* Update "AbsoluteCompareGreaterThanOrEqual" and "AbsoluteCompareGreaterThanOrEqualScalar" in AdvSimd.PlatformNotSupported.cs AdvSimd.cs

* Update "AbsoluteCompareLessThan" and "AbsoluteCompareLessThanScalar" in AdvSimd.PlatformNotSupported.cs AdvSimd.cs

* Update "AbsoluteCompareLessThanOrEqual" and "AbsoluteCompareLessThanOrEqualScalar" in AdvSimd.PlatformNotSupported.cs AdvSimd.cs

* Add "AbsoluteDifferenceScalar" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Update "AddScalar" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Update "BitwiseSelect" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Update "CompareEqual" and "CompareEqualScalar" in AdvSimd.Arm64 in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Re-order "CompareEqual" in AdvSimd in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Update "CompareGreaterThan" and "CompareGreaterThanScalar" in AdvSimd.Arm64 in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Update "CompareGreaterThan" in AdvSimd in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Update "CompareGreaterThanOrEqual" and "CompareGreaterThanOrEqualScalar" in AdvSimd.Arm64 in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Update "CompareGreaterThanOrEqual" in AdvSimd in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Update "CompareLessThan" and "CompareLessThanScalar" in AdvSimd.Arm64 in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Update "CompareLessThan" in AdvSimd in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Update "CompareLessThanOrEqual" and "CompareLessThanOrEqualScalar" in AdvSimd.Arm64 in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Update "CompareLessThanOrEqual" in AdvSimd in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Update "CompareTest" and "CompareTestScalar" in AdvSimd.Arm64 in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Update "CompareTest" in AdvSimd in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Update "LeadingSignCount" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Update "LeadingZeroCount" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Update "PopCount" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs

* Update System.Runtime.Intrinsics.Experimental.cs

* Re-order "AbsScalar" in hwintrinsiclistarm64.h

* Re-order "TransposeEven" and "TransposeOdd" in hwintrinsiclistarm64.h

* Update "Abs" in AdvSimd and AdvSimd_Arm64 in hwintrinsiclistarm64.h

* Update "AbsScalar" in AdvSimd and AdvSimd_Arm64 in hwintrinsiclistarm64.h

* Update "AbsoluteCompareGreaterThan" and "AbsoluteCompareGreaterThanScalar" in AdvSimd_Arm64 in hwintrinsiclistarm64.h

* Update "AbsoluteCompareGreaterThanOrEqual" and "AbsoluteCompareGreaterThanOrEqualScalar" in AdvSimd_Arm64 in hwintrinsiclistarm64.h

* Update "AbsoluteCompareLessThan" and "AbsoluteCompareLessThanScalar" in AdvSimd_Arm64 in hwintrinsiclistarm64.h

* Update "AbsoluteCompareLessThanOrEqual" and "AbsoluteCompareLessThanOrEqualScalar" in AdvSimd_Arm64 in hwintrinsiclistarm64.h

* Add "AbsoluteDifferenceScalar" in AdvSimd_Arm64 in hwintrinsiclistarm64.h

* Update "AddScalar" in AdvSimd in hwintrinsiclistarm64.h

*  Update "Add" in AdvSimd_Arm64 in hwintrinsiclistarm64.h

* Add "CompareEqualScalar" in AdvSimd_Arm64 in hwintrinsiclistarm64.h

* Add "CompareGreaterThanScalar" and "CompareGreaterThanOrEqualScalar" in AdvSimd_Arm64 in hwintrinsiclistarm64.h

* Add "CompareLessThanScalar" and "CompareLessThanOrEqualScalar" in AdvSimd_Arm64 in hwintrinsiclistarm64.h

* Add "CompareTestScalar" in AdvSimd_Arm64 in hwintrinsiclistarm64.h

* Add AdvSimd_Arm64_CompareLessThanScalar AdvSimd_Arm64_CompareLessThanOrEqualScalar AdvSimd_Arm64_AbsoluteCompareLessThanScalar AdvSimd_Arm64_AbsoluteCompareLessThanOrEqualScalar in hwintrinsiccodegenarm64.cpp

* Support Vector64<double>, Vector64<long> and Vector64<ulong> in Compiler::getBaseTypeAndSizeOfSIMDType() in compiler.h simd.cpp

* Stop treating Vector64<long>, Vector64<ulong> and Vector64<double> as unsupported types in MethodTable::GetVectorSize() in class.cpp

* Support scalar comparison operations in emitarm64.cpp

* For SimpleSIMD instructions that operates on 64x1 type remove INS_OPTS_1D in hwintrinsiccodegenarm64.cpp

* Add special hanling for SIMDIntrinsicInit for Vector64<double> in CodeGen::genSIMDIntrinsicInit in codegenarm64.cpp

* Add an assertion since INS_dup does not have .1D encoding in emitarm64.cpp

* Add LoadVector64 tests for Vector64<double>, Vector64<long> and Vector64<ulong> in GenerateTests.csx

* Add "Add" in Helpers.cs Helpers.tt

* Add "Abs" in Helpers.cs Helpers.tt

* Update "Abs" in AdvSimd in GenerateTests.csx

* Update "AbsScalar" in AdvSimd in GenerateTests.csx

* Update "Abs" and "AbsScalar" in AdvSimd.Arm64 in GenerateTests.csx

* Update "AbsoluteCompare*" in AdvSimd in GenerateTests.csx

* Update "AbsoluteCompare*" in AdvSimd.Arm64 in GenerateTests.csx

* Update "AbsoluteDifference" in AdvSimd in GenerateTests.csx

* Update "AbsoluteDifference" in AdvSimd.Arm64 in GenerateTests.csx

* Update "Add" in AdvSimd in GenerateTests.csx

* Update "AddScalar" in AdvSimd in GenerateTests.csx

* Update "AddScalar" in AdvSimd.Arm64 in GenerateTests.csx

* Update "BitwiseSelect" in AdvSimd in GenerateTests.csx

* Update "AddAcross" in AdvSimd.Arm64 in GenerateTests.csx

* Update "CompareEqual" in AdvSimd in GenerateTests.csx

* Update "CompareEqual" and "CompareEqualScalar" in AdvSimd.Arm64 in GenerateTests.csx

* Update "CompareGreaterThan" in AdvSimd in GenerateTests.csx

* Update "CompareGreaterThan" and "CompareGreaterThanScalar" in AdvSimd.Arm64 in GenerateTests.csx

* Update "CompareGreaterThanOrEqual" in AdvSimd in GenerateTests.csx

* Update "CompareGreaterThanOrEqual" and "CompareGreaterThanOrEqualScalar" in AdvSimd.Arm64 in GenerateTests.csx

* Update "CompareLessThan" in AdvSimd in GenerateTests.csx

* Update "CompareLessThan" and "CompareLessThanScalar" in AdvSimd.Arm64 in GenerateTests.csx

* Update "CompareLessThanOrEqual" in AdvSimd in GenerateTests.csx

* Update "CompareLessThanOrEqual" and "CompareLessThanOrEqualScalar" in AdvSimd.Arm64 in GenerateTests.csx

* Update "CompareTest" in AdvSimd in GenerateTests.csx

* Update "CompareTest" and "CompareTestScalar" in AdvSimd.Arm64 in GenerateTests.csx

* Update "LeadingSignCount" in AdvSimd in GenerateTests.csx

* Update "LeadingZeroCount" in AdvSimd in GenerateTests.csx

* Update "PopCount" in AdvSimd in GenerateTests.csx

* Update "LoadVector64" in AdvSimd in GenerateTests.csx

* Update "LoadVector128" in AdvSimd in GenerateTests.csx

* Use ValidateIterResult in LoadUnOpTest.template

* Update AdvSimd/ AdvSimd.Arm64/
251 files changed:
src/coreclr/src/jit/codegenarm64.cpp
src/coreclr/src/jit/compiler.h
src/coreclr/src/jit/emitarm64.cpp
src/coreclr/src/jit/hwintrinsiccodegenarm64.cpp
src/coreclr/src/jit/hwintrinsiclistarm64.h
src/coreclr/src/jit/simd.cpp
src/coreclr/src/vm/class.cpp
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/Abs.Vector128.Double.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/Abs.Vector128.Int64.cs [moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/Abs.Vector128.UInt64.cs with 95% similarity]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AbsScalar.Vector64.Int64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AbsoluteCompareGreaterThanOrEqualScalar.Vector64.Double.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AbsoluteCompareGreaterThanOrEqualScalar.Vector64.Single.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AbsoluteCompareGreaterThanScalar.Vector64.Double.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AbsoluteCompareGreaterThanScalar.Vector64.Single.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AbsoluteCompareLessThanOrEqualScalar.Vector64.Double.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AbsoluteCompareLessThanOrEqualScalar.Vector64.Single.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AbsoluteCompareLessThanScalar.Vector64.Double.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AbsoluteCompareLessThanScalar.Vector64.Single.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AbsoluteDifferenceScalar.Vector64.Double.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AbsoluteDifferenceScalar.Vector64.Single.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/Add.Vector128.Double.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AdvSimd.Arm64_r.csproj
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AdvSimd.Arm64_ro.csproj
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareEqual.Vector128.Double.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareEqual.Vector128.Int64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareEqual.Vector128.UInt64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareEqualScalar.Vector64.Double.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareEqualScalar.Vector64.Int64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareEqualScalar.Vector64.Single.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareEqualScalar.Vector64.UInt64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareGreaterThan.Vector128.Double.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareGreaterThan.Vector128.Int64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareGreaterThan.Vector128.UInt64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareGreaterThanOrEqual.Vector128.Double.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareGreaterThanOrEqual.Vector128.Int64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareGreaterThanOrEqual.Vector128.UInt64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareGreaterThanOrEqualScalar.Vector64.Double.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareGreaterThanOrEqualScalar.Vector64.Int64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareGreaterThanOrEqualScalar.Vector64.Single.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareGreaterThanOrEqualScalar.Vector64.UInt64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareGreaterThanScalar.Vector64.Double.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareGreaterThanScalar.Vector64.Int64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareGreaterThanScalar.Vector64.Single.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareGreaterThanScalar.Vector64.UInt64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareLessThan.Vector128.Double.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareLessThan.Vector128.Int64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareLessThan.Vector128.UInt64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareLessThanOrEqual.Vector128.Double.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareLessThanOrEqual.Vector128.Int64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareLessThanOrEqual.Vector128.UInt64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareLessThanOrEqualScalar.Vector64.Double.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareLessThanOrEqualScalar.Vector64.Int64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareLessThanOrEqualScalar.Vector64.Single.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareLessThanOrEqualScalar.Vector64.UInt64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareLessThanScalar.Vector64.Double.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareLessThanScalar.Vector64.Int64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareLessThanScalar.Vector64.Single.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareLessThanScalar.Vector64.UInt64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareTest.Vector128.Double.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareTest.Vector128.Int64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareTest.Vector128.UInt64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareTestScalar.Vector64.Double.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareTestScalar.Vector64.Int64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/CompareTestScalar.Vector64.UInt64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/Program.AdvSimd.Arm64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Abs.Vector128.Int16.cs [moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Abs.Vector128.UInt16.cs with 95% similarity]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Abs.Vector128.Int32.cs [moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Abs.Vector128.UInt32.cs with 94% similarity]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Abs.Vector128.SByte.cs [moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Abs.Vector128.Byte.cs with 95% similarity]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Abs.Vector128.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Abs.Vector64.Int16.cs [moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Abs.Vector64.UInt16.cs with 95% similarity]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Abs.Vector64.Int32.cs [moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Abs.Vector64.UInt32.cs with 94% similarity]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Abs.Vector64.SByte.cs [moved from src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Abs.Vector64.Byte.cs with 95% similarity]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Abs.Vector64.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AbsScalar.Vector64.Double.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AbsScalar.Vector64.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Add.Vector128.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Add.Vector128.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Add.Vector128.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Add.Vector128.Int64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Add.Vector128.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Add.Vector128.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Add.Vector128.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Add.Vector128.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Add.Vector128.UInt64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Add.Vector64.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Add.Vector64.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Add.Vector64.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Add.Vector64.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Add.Vector64.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Add.Vector64.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Add.Vector64.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddScalar.Vector64.Double.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddScalar.Vector64.Int64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddScalar.Vector64.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AddScalar.Vector64.UInt64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AdvSimd_r.csproj
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AdvSimd_ro.csproj
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector128.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector128.Double.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector128.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector128.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector128.Int64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector128.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector128.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector128.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector128.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector128.UInt64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector64.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector64.Double.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector64.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector64.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector64.Int64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector64.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector64.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector64.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector64.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/BitwiseSelect.Vector64.UInt64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareEqual.Vector128.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareEqual.Vector128.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareEqual.Vector128.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareEqual.Vector128.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareEqual.Vector128.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareEqual.Vector128.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareEqual.Vector128.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareEqual.Vector64.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareEqual.Vector64.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareEqual.Vector64.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareEqual.Vector64.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareEqual.Vector64.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareEqual.Vector64.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareEqual.Vector64.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThan.Vector128.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThan.Vector128.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThan.Vector128.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThan.Vector128.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThan.Vector128.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThan.Vector128.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThan.Vector128.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThan.Vector64.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThan.Vector64.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThan.Vector64.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThan.Vector64.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThan.Vector64.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThan.Vector64.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThan.Vector64.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThanOrEqual.Vector128.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThanOrEqual.Vector128.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThanOrEqual.Vector128.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThanOrEqual.Vector128.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThanOrEqual.Vector128.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThanOrEqual.Vector128.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThanOrEqual.Vector128.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThanOrEqual.Vector64.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThanOrEqual.Vector64.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThanOrEqual.Vector64.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThanOrEqual.Vector64.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThanOrEqual.Vector64.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThanOrEqual.Vector64.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareGreaterThanOrEqual.Vector64.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThan.Vector128.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThan.Vector128.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThan.Vector128.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThan.Vector128.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThan.Vector128.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThan.Vector128.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThan.Vector128.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThan.Vector64.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThan.Vector64.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThan.Vector64.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThan.Vector64.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThan.Vector64.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThan.Vector64.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThan.Vector64.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThanOrEqual.Vector128.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThanOrEqual.Vector128.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThanOrEqual.Vector128.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThanOrEqual.Vector128.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThanOrEqual.Vector128.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThanOrEqual.Vector128.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThanOrEqual.Vector128.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThanOrEqual.Vector64.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThanOrEqual.Vector64.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThanOrEqual.Vector64.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThanOrEqual.Vector64.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThanOrEqual.Vector64.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThanOrEqual.Vector64.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareLessThanOrEqual.Vector64.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareTest.Vector128.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareTest.Vector128.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareTest.Vector128.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareTest.Vector128.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareTest.Vector128.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareTest.Vector128.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareTest.Vector128.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareTest.Vector64.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareTest.Vector64.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareTest.Vector64.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareTest.Vector64.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareTest.Vector64.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareTest.Vector64.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/CompareTest.Vector64.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingSignCount.Vector128.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingSignCount.Vector128.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingSignCount.Vector128.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingSignCount.Vector64.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingSignCount.Vector64.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingSignCount.Vector64.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingZeroCount.Vector128.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingZeroCount.Vector128.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingZeroCount.Vector128.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingZeroCount.Vector128.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingZeroCount.Vector128.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingZeroCount.Vector128.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingZeroCount.Vector64.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingZeroCount.Vector64.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingZeroCount.Vector64.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingZeroCount.Vector64.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingZeroCount.Vector64.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LeadingZeroCount.Vector64.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector128.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector128.Double.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector128.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector128.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector128.Int64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector128.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector128.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector128.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector128.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector128.UInt64.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector64.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector64.Double.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector64.Int16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector64.Int32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector64.Int64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector64.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector64.Single.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector64.UInt16.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector64.UInt32.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/LoadVector64.UInt64.cs [new file with mode: 0644]
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/PopCount.Vector128.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/PopCount.Vector128.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/PopCount.Vector64.Byte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/PopCount.Vector64.SByte.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Program.AdvSimd.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/GenerateTests.csx
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/Helpers.cs
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/Helpers.tt
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/LoadUnOpTest.template
src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/AdvSimd.PlatformNotSupported.cs
src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/AdvSimd.cs
src/libraries/System.Runtime.Intrinsics.Experimental/ref/System.Runtime.Intrinsics.Experimental.cs