[MIPS GlobalISel] Select MSA vector generic and builtin sub
authorPetar Avramovic <Petar.Avramovic@rt-rk.com>
Wed, 23 Oct 2019 09:15:25 +0000 (11:15 +0200)
committerPetar Avramovic <Petar.Avramovic@rt-rk.com>
Wed, 23 Oct 2019 09:15:25 +0000 (11:15 +0200)
commitc46d24f5c3141e9a9f2bdd9d5c38b98feffc8760
tree38eea32ec34b26481af25eb03d2a8c7ae2bd300a
parent20bf0cf2f020ce3b344838b88d8a86e156c05443
[MIPS GlobalISel] Select MSA vector generic and builtin sub

Select vector G_SUB for MIPS32 with MSA. We have to set bank
for vector operands to fprb and selectImpl will do the rest.
__builtin_msa_subv_<format> will be transformed into G_SUB
in legalizeIntrinsic and selected in the same way.
__builtin_msa_subvi_<format> will be directly selected into
SUBVI_<format> in legalizeIntrinsic.

Differential Revision: https://reviews.llvm.org/D69306
llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
llvm/test/CodeGen/Mips/GlobalISel/instruction-select/sub_vec.mir [new file with mode: 0644]
llvm/test/CodeGen/Mips/GlobalISel/legalizer/sub_vec.mir [new file with mode: 0644]
llvm/test/CodeGen/Mips/GlobalISel/legalizer/sub_vec_builtin.mir [new file with mode: 0644]
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub_vec.ll [new file with mode: 0644]
llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub_vec_builtin.ll [new file with mode: 0644]
llvm/test/CodeGen/Mips/GlobalISel/regbankselect/sub_vec.mir [new file with mode: 0644]