[binutils][aarch64] New SVE_ADDR_ZX operand.
authorMatthew Malcomson <matthew.malcomson@arm.com>
Thu, 9 May 2019 09:29:18 +0000 (10:29 +0100)
committerMatthew Malcomson <matthew.malcomson@arm.com>
Thu, 9 May 2019 09:29:18 +0000 (10:29 +0100)
commitc469c86473273e115b267a6f8c93c8942deb93c4
tree287fc69d0de95ceb865fef1bb99c4e1bd85b7ef8
parent116adc27470ed3682b6236e44e3b18838673036c
[binutils][aarch64] New SVE_ADDR_ZX operand.

Add AARCH64_OPND_SVE_ADDR_ZX operand that allows a vector of addresses
in a Zn register, offset by an Xm register.
This is used with scatter/gather SVE2 instructions.

gas/ChangeLog:

2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>

* config/tc-aarch64.c (REG_ZR): Macro specifying zero register.
(parse_address_main): Account for new addressing mode [Zn.S, Xm].
(parse_operands): Handle new SVE_ADDR_ZX operand.

include/ChangeLog:

2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>

* opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.

opcodes/ChangeLog:

2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>

* aarch64-asm-2.c: Regenerated.
* aarch64-dis-2.c: Regenerated.
* aarch64-opc-2.c: Regenerated.
* aarch64-opc.c (operand_general_constraint_met_p): Constraint checking
for SVE_ADDR_ZX.
(aarch64_print_operand): Add printing for SVE_ADDR_ZX.
* aarch64-tbl.h (AARCH64_OPERANDS): Use new SVE_ADDR_ZX operand.
gas/ChangeLog
gas/config/tc-aarch64.c
include/ChangeLog
include/opcode/aarch64.h
opcodes/ChangeLog
opcodes/aarch64-asm-2.c
opcodes/aarch64-dis-2.c
opcodes/aarch64-opc-2.c
opcodes/aarch64-opc.c
opcodes/aarch64-tbl.h