mmc: SDHC 3.0: Base clock frequency change in spec 3.0
authorZhangfei Gao <zgao6@marvell.com>
Fri, 20 Aug 2010 18:02:36 +0000 (14:02 -0400)
committerChris Ball <cjb@laptop.org>
Sat, 23 Oct 2010 13:11:14 +0000 (21:11 +0800)
commitc4687d5f601be3f928b815b46964f7426c31aec7
treeb58c75fd2e7615f6e34637665633b55f02f2d171
parent85105c53b0ce70a277160379f9d89309cefc0bfd
mmc: SDHC 3.0: Base clock frequency change in spec 3.0

SDHC Spec 3.0: Capabilities Register bits[15-08] are Base Clock Frequency
      1.0/2.0: Capabilities Register bits[13-08] are Base Clock Frequency

Signed-off-by: Zhangfei Gao <zgao6@marvell.com>
Cc: David Vrabel <david.vrabel@csr.com>
Cc: Matt Fleming <matt@console-pimps.org>
Cc: Michal Miroslaw <mirqus@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
drivers/mmc/host/sdhci.c
drivers/mmc/host/sdhci.h