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GlobalISel: Fix truncating shift amount in trunc (shl) combine
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Sat, 19 Sep 2020 12:26:38 +0000 (08:26 -0400)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 23 Sep 2020 13:07:50 +0000 (09:07 -0400)
commitc463fd136ec259ec269ee6741763ce595811da71
tree9b5a960bc7a2f25547749ac6ac95d752165cdfb1tree | snapshot
parentaf0207f2bae8578c5283877a786e502ce6e33b14commit | diff
GlobalISel: Fix truncating shift amount in trunc (shl) combine

The shift amount type does not necessarily match the result type. This
was inserting a trunc from s32 to s32, which asserted. Just preserve
the original shift amount type which can be legalized later.
llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp diff | blob | history
llvm/test/CodeGen/AArch64/GlobalISel/combine-trunc.mir diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/combine-trunc-shl.mir [new file with mode: 0644] blob
Domain: System / Toolchain;