drm/amd/display: put back front end initialization sequence
authorEric Yang <Eric.Yang2@amd.com>
Mon, 24 Jun 2019 22:18:58 +0000 (18:18 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 18 Jul 2019 19:27:25 +0000 (14:27 -0500)
commitc43f89f81cc0c54c7c460f1d6365445939069c83
treed5184f64c6c25363a2cce8aa30339903dffe04eb
parent008a4016c5cf922d33456916ec3fad9ac4c98962
drm/amd/display: put back front end initialization sequence

[Why]
Seamless boot optimization removed proper front end power off sequence.
In driver disable enable case, this causes driver to power gate hubp
and dpp while there is still memory fetching going on, this can cause
invalid memory requests to be generated which will hang data fabric.

[How]
Put back proper front end power off sequence

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c