i2c: piix4: Add EFCH MMIO support to SMBus base address detect
authorTerry Bowman <terry.bowman@amd.com>
Wed, 9 Feb 2022 17:27:15 +0000 (11:27 -0600)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 25 May 2022 07:57:22 +0000 (09:57 +0200)
commitc4194b266bf7ef8ac5c38394b1427255598fb084
tree4c344902a7ccd7d21da19cf7603532c43711005b
parent4b965566ca26e83553d92b8c57050e5d59911806
i2c: piix4: Add EFCH MMIO support to SMBus base address detect

commit 46967bc1ee93acd1d8953c87dc16f43de4076f93 upstream.

The EFCH SMBus controller's base address is determined using details in
FCH::PM::DECODEEN[smbusasfiobase] and FCH::PM::DECODEEN[smbusasfioen].These
register fields were accessed using cd6h/cd7h port I/O. cd6h/cd7h port I/O
is no longer available in later AMD processors. Change base address
detection to use MMIO instead of port I/O cd6h/cd7h.

Signed-off-by: Terry Bowman <terry.bowman@amd.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Cc: Mario Limonciello <Mario.Limonciello@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/i2c/busses/i2c-piix4.c