[libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs.
authorJohn Baldwin <jhb@FreeBSD.org>
Tue, 15 May 2018 22:44:56 +0000 (22:44 +0000)
committerJohn Baldwin <jhb@FreeBSD.org>
Tue, 15 May 2018 22:44:56 +0000 (22:44 +0000)
commitc3f240f7dc0387a6efabb75ee86cd5b453e0b196
treef018ee40e5efe1f4a7f22fe8884c6351581b2574
parent85d3a702da8f937ab1a818411a2c3ba7df294279
[libunwind][MIPS] Support MIPS floating-point registers for hard-float ABIs.

Summary:
For MIPS ABIs with 64-bit floating point registers including newabi
and O32 with 64-bit floating point registers, just save and restore the
32 floating-point registers as doubles.

For O32 MIPS with 32-bit floating-point registers, save and restore the
individual floating-point registers as "plain" registers.  These registers
are encoded as floats rather than doubles, but the DWARF unwinder
assumes that floating-point registers are stored as doubles when reading
them from memory (via AddressSpace::getDouble()).  Treating the
registers as "normal" registers instead causes the DWARF unwinder to
fetch them from memory as a 32-bit register.  This does mean that for
O32 with 32-bit floating-point registers unw_get_fpreg() and
unw_set_fpreg() do not work.  One would have to use unw_get_reg()
and unw_set_reg() instead.  However, DWARF unwinding works
correctly as the DWARF CFI emits records for individual 32-bit
floating-point registers even when they are treated as doubles stored
in paired registers.  If the lack of unw_get/set_fpreg() becomes a pressing
need in the future for O32 MIPS we could add in special handling to
make it work.

Reviewers: sdardis, compnerd

Reviewed By: sdardis

Differential Revision: https://reviews.llvm.org/D41968

llvm-svn: 332414
libunwind/include/__libunwind_config.h
libunwind/include/libunwind.h
libunwind/src/Registers.hpp
libunwind/src/UnwindRegistersRestore.S
libunwind/src/UnwindRegistersSave.S
libunwind/src/libunwind.cpp