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(parent: 27a986d) | patch
clk: stm32mp1: add set_rate for DDRPHYC clock
authorPatrick Delaunay <patrick.delaunay@st.com>
Thu, 18 Apr 2019 15:32:48 +0000 (17:32 +0200)
committerPatrice Chotard <patrice.chotard@st.com>
Thu, 23 May 2019 09:36:47 +0000 (11:36 +0200)
commitc3e828bff26a14dba9b66ead8d01937aae97657d
tree324a87f00a01a97985f2c04e5d50800b91ae583ctree | snapshot
parent27a986d4e4e90ae5895ced1cf78a607a8b726b9ecommit | diff
clk: stm32mp1: add set_rate for DDRPHYC clock

Add the DDRPHYC support for clk_set_rate, used in DDR interactive mode

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
drivers/clk/clk_stm32mp1.c diff | blob | history
Domain: System / Kernel;