arm: improve tests for vcmulq*
authorAndrea Corallo <andrea.corallo@arm.com>
Mon, 28 Nov 2022 16:35:24 +0000 (17:35 +0100)
committerAndrea Corallo <andrea.corallo@arm.com>
Wed, 25 Jan 2023 13:36:23 +0000 (14:36 +0100)
commitc3c828436e7db1787d644153fe07daf356c99f2a
tree8127d5b3868a475266ea5b246b4619fef70bf6ac
parent0ea30b2a83c908323d73309b6f698331607eb2e0
arm: improve tests for vcmulq*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vcmulq_f16.c: Use
check-function-bodies instead of scan-assembler checks.  Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vcmulq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c: Likewise.
24 files changed:
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c