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author	Matheus Almeida <matheus.almeida@imgtec.com>
	Wed, 18 Jun 2014 13:30:57 +0000 (13:30 +0000)
committer	Matheus Almeida <matheus.almeida@imgtec.com>
	Wed, 18 Jun 2014 13:30:57 +0000 (13:30 +0000)
commit	c3c18956deb1964c1f7ae3d2804bff467d6f30e8
tree	ba134a06284a1596f2e92e2430d46d00544230cb	tree \| snapshot
parent	7e81576246ce7c2f01fcbc9375b911cad4b458f1	commit \| diff

[mips] Implement alias for 'and' and 'or' instructions for all ISAs.

Summary:
Examples:
and $2, 4 <=> andi $2, $2, 4
or $2, 4 <=> ori $2, $2, 4

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D4155

llvm-svn: 211161

12 files changed:

Domain: System / Toolchain;

RSS Atom

llvm/lib/Target/Mips/MipsInstrInfo.td		diff \| blob \| history
llvm/test/MC/Mips/mips1/valid.s		diff \| blob \| history
llvm/test/MC/Mips/mips2/valid.s		diff \| blob \| history
llvm/test/MC/Mips/mips3/valid.s		diff \| blob \| history
llvm/test/MC/Mips/mips32/valid.s		diff \| blob \| history
llvm/test/MC/Mips/mips32r2/valid.s		diff \| blob \| history
llvm/test/MC/Mips/mips32r6/valid.s		diff \| blob \| history
llvm/test/MC/Mips/mips4/valid.s		diff \| blob \| history
llvm/test/MC/Mips/mips5/valid.s		diff \| blob \| history
llvm/test/MC/Mips/mips64/valid.s		diff \| blob \| history
llvm/test/MC/Mips/mips64r2/valid.s		diff \| blob \| history
llvm/test/MC/Mips/mips64r6/valid.s		diff \| blob \| history