[DAGCombiner][RISCV] Allow rotates by non-constant to be matched for i32 on riscv64...
authorCraig Topper <craig.topper@sifive.com>
Sun, 6 Feb 2022 18:44:05 +0000 (10:44 -0800)
committerCraig Topper <craig.topper@sifive.com>
Sun, 6 Feb 2022 18:58:12 +0000 (10:58 -0800)
commitc35ccd2ac852bec22c5eafb65bf0e9adb1451df0
tree109c99b1a76e639a327af2a008b87c52a5e117a3
parenteb65f971f2aa55526c5a58e40261f2a9add9d1ae
[DAGCombiner][RISCV] Allow rotates by non-constant to be matched for i32 on riscv64 with Zbb.

rv64izbb has a RORW/ROLW instructions that operate on the lower
32-bits of a 64-bit value and sign extend bit 31 of the result.

DAGCombiner won't match rotate idioms because the i32 type isn't Legal
on riscv64.

This patch teaches DAGCombiner to allow it if the type is going to
be promoted and the target has Custom type legalization for ISD::ROTL
or ISD::ROTR. I've restricted this to scalar types. It doesn't appear
any in tree targets other than riscv64 have custom type legalization
for rotates.

If this patch isn't acceptable, I guess I can match SRLW, SLLW, and OR
after type legalization, but I'd like to avoid that if possible.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D119062
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/test/CodeGen/RISCV/rotl-rotr.ll