sim: rx: add missing break to memory write
authorMike Frysinger <vapier@gentoo.org>
Thu, 21 Dec 2023 06:36:40 +0000 (01:36 -0500)
committerMike Frysinger <vapier@gentoo.org>
Thu, 21 Dec 2023 06:44:13 +0000 (01:44 -0500)
commitc31d7253d2d3bee10388a4908a4bffb0d0011c0a
treecc28ca86e89a30fbef2ea8c87eb279bf3413910c
parent4935610a577445aef20643a226bca7e6bd11fcb4
sim: rx: add missing break to memory write

It doesn't seem like we want to keep executing the next block of code
after processing the request.
sim/rx/mem.c