[interp] Move from stack based to fully local var based design (#46037)

[interp] Move from stack based to fully local var based design (#46037)

Instead of having instructions that push and pop from the stack, every instruction has explicit dreg and sregs.

While the purpose of this PR is mainly to make it easier to implement more advanced optimization in the future, it also has noticeable performance implications. The code is simplified because we no longer need to update and save the SP. However, the code for each instruction is bloated due to the addition of explicit source and destination offsets. This is counteracted by the reduction of the total number of instructions, since ldloc/stloc and moves become redundant and they are mostly optimized away, even in this implementation state. Here are the total number of executed opcodes as part of running the corlib test suite with the interp https://gist.github.com/BrzVlad/d62f504930b75cba4b870e6dbd947e90.

Co-authored-by: BrzVlad <BrzVlad@users.noreply.github.com>