RISC-V: Simplify ASM checks in gcc.target/riscv/rvv/base/.
authorKito Cheng <kito.cheng@sifive.com>
Mon, 19 Dec 2022 13:55:15 +0000 (21:55 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Mon, 19 Dec 2022 14:22:30 +0000 (22:22 +0800)
commitc2c29fbebb9ea2e9e720a29d74b4e541e5c79953
treebd4a29b19b6586841e7153b936235fe3f4d44a0b
parent9243c3d1b63b9092a82178392145f9e9d62423d9
RISC-V: Simplify ASM checks in gcc.target/riscv/rvv/base/.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/mov-1.c: Simplify operand check.
* gcc.target/riscv/rvv/base/mov-10.c: Ditto.
* gcc.target/riscv/rvv/base/mov-11.c: Ditto.
* gcc.target/riscv/rvv/base/mov-12.c: Ditto.
* gcc.target/riscv/rvv/base/mov-2.c: Ditto.
* gcc.target/riscv/rvv/base/mov-3.c: Ditto.
* gcc.target/riscv/rvv/base/mov-4.c: Ditto.
* gcc.target/riscv/rvv/base/mov-5.c: Ditto.
* gcc.target/riscv/rvv/base/mov-6.c: Ditto.
* gcc.target/riscv/rvv/base/mov-8.c: Ditto.
* gcc.target/riscv/rvv/base/mov-9.c: Ditto.
* gcc.target/riscv/rvv/base/vread_csr.c: Ditto.
* gcc.target/riscv/rvv/base/vsetvl-1.c: Ditto.
* gcc.target/riscv/rvv/base/vwrite_csr.c: Ditto.
14 files changed:
gcc/testsuite/gcc.target/riscv/rvv/base/mov-1.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-10.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-11.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-12.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-2.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-3.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-4.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-5.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-6.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-8.c
gcc/testsuite/gcc.target/riscv/rvv/base/mov-9.c
gcc/testsuite/gcc.target/riscv/rvv/base/vread_csr.c
gcc/testsuite/gcc.target/riscv/rvv/base/vsetvl-1.c
gcc/testsuite/gcc.target/riscv/rvv/base/vwrite_csr.c