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(parent: 8786a94) | patch
[SLPVectorizer] Flag ADD/SUB SSAT/USAT intrinsics trivially vectorizable (PR40123)
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 3 Jan 2019 12:18:23 +0000 (12:18 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 3 Jan 2019 12:18:23 +0000 (12:18 +0000)
commitc2aadfaaad40f342c15d82ca0810f63cb22573ca
tree0d949ae855f66b1b562bd944aa5a034b3939439btree | snapshot
parent8786a946d8c972a6a9165ece60d77486d1583a9acommit | diff
[SLPVectorizer] Flag ADD/SUB SSAT/USAT intrinsics trivially vectorizable (PR40123)

Enables SLP vectorization for the SSE2 PADDS/PADDUS/PSUBS/PSUBUS style intrinsics

llvm-svn: 350300
llvm/lib/Analysis/VectorUtils.cpp diff | blob | history
llvm/test/Transforms/SLPVectorizer/X86/arith-add-ssat.ll diff | blob | history
llvm/test/Transforms/SLPVectorizer/X86/arith-add-usat.ll diff | blob | history
llvm/test/Transforms/SLPVectorizer/X86/arith-sub-ssat.ll diff | blob | history
llvm/test/Transforms/SLPVectorizer/X86/arith-sub-usat.ll diff | blob | history
Domain: System / Toolchain;