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(parent: d3fa91c) | patch
drm/msm/a6xx: Add gmu_read64() register read op
authorSharat Masetty <smasetty@codeaurora.org>
Thu, 4 Oct 2018 09:41:41 +0000 (15:11 +0530)
committerRob Clark <robdclark@gmail.com>
Thu, 4 Oct 2018 13:14:20 +0000 (09:14 -0400)
commitc28aa2031f64701d4a1a78f97147e93fc5eb0c04
tree4f7859b4a71ce15ca4d78255c54317055c11c0bctree | snapshot
parentd3fa91c90931e6f3b26f7acbac84b44c6756fa08commit | diff
drm/msm/a6xx: Add gmu_read64() register read op

Add a simple function to read 64 registers in the GMU domain

Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
drivers/gpu/drm/msm/adreno/a6xx_gmu.h diff | blob | history
Domain: System / Kernel;