e1000e: Set HW FIFO minimum pointer gap for non-gig speeds
authorRaanan Avargil <raanan.avargil@intel.com>
Tue, 22 Dec 2015 13:35:03 +0000 (15:35 +0200)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Wed, 24 Feb 2016 22:47:12 +0000 (14:47 -0800)
commitc26f40daf4e32f970b8337a88b65a8d00332ae6f
tree41c0e8b6c3ce68bb4a24a47c7979d5ab01a24b60
parent74f31299a41e729226d60426087592b6790f22b7
e1000e: Set HW FIFO minimum pointer gap for non-gig speeds

Based on feedback from HW team, the configured value of the internal PHY
HW FIFO pointer gap was incorrect for non-gig speeds.
This patch provides the correct configuration.

Signed-off-by: Raanan Avargil <raanan.avargil@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/e1000e/ich8lan.c