drm/amd/display: Indirect reg read macro with shift and mask
authorNoah Abradjian <noah.abradjian@amd.com>
Tue, 17 Dec 2019 20:49:14 +0000 (15:49 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 16 Jan 2020 19:13:53 +0000 (14:13 -0500)
commitc1e3417558beda21fd41ed870ca16b36a69188d5
tree5172d8d42dcbff9cb2e2da91f28644aa6f3625e9
parentec256f449c07b2498f624ec7b9ca41177c989d7c
drm/amd/display: Indirect reg read macro with shift and mask

[Why]
Recent double buffering changes for dcn2 use IX_REG_READ.
However, this macro returns the full register value, with the need to
manually shift and mask it to retrieve field data.

[How]
Create new IX_REG_GET macro that handles shift and mask.
Use this for double buffering reads instead of IX_REG_READ.

Signed-off-by: Noah Abradjian <noah.abradjian@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dc_helper.c
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.h
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.h
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h